Low-cost Bit Permutation Circuit with Concise Configuration Rule

نویسندگان

  • Tianyong Ao
  • Zhangqing He
  • Kui Dai
  • Xuecheng Zou
چکیده

Bit-level permutation is widely used in cryptography systems. However, it is not well-supported in simple and low-cost way. Here, a low-cost construction of n-bit permutation circuit capability of n! permutations is proposed. This construction just needs one n-to-1 multiplexer and (2n + n ∗ ⌈log2n⌉) bits registers. Its configuration rule is very concise. Users only straightforward input the numbers that indicate which bit of source data will go to i-th bit of destination data. The Synopsys’ DC synthesis results show that approximate 31% of the area can be saved by this architecture compared with Benes networks of identical size. This design provides a new perspective on implementation of bit permutation and may be helpful for the design of secure resource-constrained systems.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A Low Cost Sensorless Control Drive Circuit for of Low Voltage Switched Reluctance Motor

Shaft position sensing is an essential part of switched reluctance (SR) motor drive In order to synchronize the pulses of phase current with the period of rising inductance of the proper motor phase. Direct sensors such as, Hall effect and optical encoder are commonly used in SR motors. The purpose of this paper is to present an indirect shaft positioning sensing known as "sensorless " control ...

متن کامل

تحلیل و طراحی تغییر دهنده فاز N - بیتی MEMS توزیع شده در باند Ka

Modern microwave and millimeter wave phased array antennas are attractive because of their ability to steer wave beams in space without physically moving the antenna element. A typical phased array antenna may have several thousand elements fed by a phase shifter for every antenna, which can steer the resulting array beam to different directions. Their low loss, low cost and lightweight phase s...

متن کامل

A Novel Design of Reversible Multiplier Circuit (TECHNICAL NOTE)

Adders and multipliers are two main units of the computer arithmetic processors and play an important role in reversible computations. The binary multiplier consists of two main parts, the partial products generation circuit (PPGC) and the reversible parallel adders (RPA). This paper introduces a novel reversible 4×4 multiplier circuit that is based on an advanced PPGC with Peres gates only. Ag...

متن کامل

Low-Power Adder Design for Nano-Scale CMOS

A fast low-power 1-bit full adder circuit suitable for nano-scale CMOS implementation is presented. Out of the three modules in a common full-adder circuit, we have replaced one with a new design, and optimized another one, all with the goal to reduce the static power consumption. The design has been simulated and evaluated using the 65 nm PTM models.

متن کامل

A New Circuit Scheme for Wide Dynamic Circuits

In this paper, a new circuit scheme is proposed to reduce the power consumption of dynamic circuits. In the proposed circuit, an NMOS keeper transistor is used to maintain the voltage level in the output node against charge sharing, leakage current and noise sources. Using the proposed keeper scheme, the voltage swing on the dynamic node is lowered to reduce the power consumption of wide fan-in...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2015